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2018-09-03 · 첨삭 강사 Rose

학생이 쓴 원문

The second company gave me a lot of experience and knowledge. I designed hardware of semiconductor test equipment for memory test. I developed an overall power supply plan for the equipment and I designed the entire power board, bridge board, main board, and memory device board required for the equipment. And Signal Integrity and power lntegrity is important in semiconductor test equipment. So I used external termination and internal termination of FPGA. I have been check signal integrity using Ibis file of FPGA My two projects were mass produced. After then, I changed my position to logic design. The first Logic project was a timing generator. The logic design made the one clock with two edges and implemented 16 channels. The advantages of a clock implemented with FPGA can be useful for testing by freely adjusting the duty and frequency. It is a very important point because it is a clock used in equipment.

강사 첨삭

Yes, second one!

The second company gave me a lot of experience and knowledge. 

>>CORRECT!
 I designed hardware of semiconductor test equipment for memory test. 

>> I designed the hardware of semiconductor test equipment for memory test. 
 I developed an overall power supply plan for the equipment and I designed the entire power board, bridge board, main board, and memory device board required for the equipment.

>>CORRECT!
 And Signal Integrity and power lntegrity is important in semiconductor test equipment. So I used external termination and internal termination of FPGA. 

>>Furthermore, Signal Integrity and Power Integrity are the important in semiconductor test equipment, so I used external termination and internal termination of FPGA. 
 I have been check signal integrity using Ibis file of FPGA

>> I have checked signal integrity using Ibis file of FPGA
 My two projects were mass produced.

>>CORRECT!
 After then, I changed my position to logic design. 

>>CORRECT!
 The first Logic project was a timing generator. 

>>CORRECT!
 The logic design made the one clock with two edges and implemented 16 channels. 

>> The logic design made one clock with two edges and implemented 16 channels. 
 The advantages of a clock implemented with FPGA can be useful for testing by freely adjusting the duty and frequency. 

>>CORRECT! 
It is a very important point because it is a clock used in equipment.

>>CORRECT!

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